? 1999 fairchild semiconductor corporation ds009598 www.fairchildsemi.com april 1988 revised august 1999 74f827 ? 74f828 10-bit buffers/line drivers 74f827 ? 74f828 10-bit buffers/line drivers general description the 74f827 and 74f828 10-bit bus buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. the 10-bit buffers have nor output enables for maximum control flexibility. the 74f828 is an inverting version of the 74f827. features n 3-state output n 74f828 is inverting ordering code: devices also available in tape and reel. specify by appending the suffix letter x to the ordering code. connection diagrams 74f827 74f828 order number package number package description 74f827sc m24b 24-lead small outline integrated circuit (soic), jedec ms-013, 0.300 wide 74f827spc n24c 24-lead plastic dual-in-line package (pdip), jedec ms-100, 0.300 wide 74f828sc m24b 24-lead small outline integrated circuit (soic), jedec ms-013, 0.300 wide 74f828spc n24c 24-lead plastic dual-in-line package (pdip), jedec ms-100, 0.300 wide
www.fairchildsemi.com 2 74f827 ? 74f828 logic symbols 74f827 ieee/iec 74f827 74f828 ieee/iec 74f828 unit loading/fan out functional description the 74f827 and 74f828 are line drivers designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers which provide improved pc board density. the devices have 3-state outputs controlled by the output enable (oe ) pins. the outputs can sink 64 ma and source 15 ma. input clamp diodes limit high-speed termination effects. function table h = high voltage level l = low voltage level z = high impedance x = immate rial pin names description u.l. input i ih /i il high/low output i oh /i ol oe 1 , oe 2 output enable input 1.0/1.0 20 m a/ - 0.6 ma d 0 Cd 7 data inputs 1.0/1.0 20 m a/ - 0.6 ma o 0 Co 7 data outputs, 3-state 600/106.6 (80) - 12 ma/64 ma (48 ma) inputs outputs oe d n o n function 74f827 74f828 l h h l transparent l l l h transparent h x z z high z
3 www.fairchildsemi.com 74f827 ? 74f828 logic diagrams 74f827 please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate pro pagation delays. 74f828 please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate pro pagation delays.
www.fairchildsemi.com 4 74f827 ? 74f828 absolute maximum ratings (note 1) recommended operating conditions note 1: absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. functional operation under these conditions is not implied. note 2: either voltage limit or current limit is sufficient to protect inputs. dc electrical characteristics storage temperature - 65 c to + 150 c ambient temperature under bias - 55 c to + 125 c junction temperature under bias - 55 c to + 150 c v cc pin potential to ground pin - 0.5v to + 7.0v input voltage (note 2) - 0.5v to + 7.0v input current (note 2) - 30 ma to + 5.0 ma voltage applied to output in high state (with v cc = 0v) standard output - 0.5v to v cc 3-state output - 0.5v to + 5.5v current applied to output in low state (max) twice the rated i ol (ma) free air ambient temperature 0 c to + 70 c supply voltage + 4.5v to + 5.5v symbol parameter min typ max units v cc conditions v ih input high voltage 2.0 v recognized as a high signal v il input low voltage 0.8 v recognized as a low signal v cd input clamp diode voltage - 1.2 v min i in = - 18 ma v oh output high 10% v cc 2.4 vmin i oh = - 3 ma voltage 10% v cc 2.0 i oh = - 15 ma 5% v cc 2.7 i oh = - 3 ma v ol output low 10% v cc 0.55 v min i ol = 64 ma voltage i ih input high 5.0 m amaxv in = 2.7v current i bvi input high current 7.0 m amaxv in = 7.0v breakdown test i cex output high 50 m amaxv out = v cc leakage current v id input leakage 4.75 v 0.0 i id = 1.9 m a te s t all other pins grounded i od output leakage 3.75 m a0.0 v iod = 150 mv circuit current all other pins grounded i il input low current - 0.6 ma max v in = 0.5v i ozh output leakage current 50 m amaxv out = 2.7v i ozl output leakage current - 50 m amaxv out = 0.5v i os output short-circuit current - 100 - 225 ma max v out = 0v i zz bus drainage test 500 m a0.0vv out = 5.25v i cch power supply current (74f827) 30 45 ma max v o = high i ccl power supply current (74f827) 60 90 ma max v o = low i ccz power supply current (74f827) 40 60 ma max v o = high z i cch power supply current (74f828) 14 20 ma max v o = high i ccl power supply current (74f828) 56 85 ma max v o = low i ccz power supply current (74f828) 35 50 ma max v o = high z
5 www.fairchildsemi.com 74f827 ? 74f828 ac electrical characteristics symbol parameter t a = + 25 ct a = - 55 c to + 125 ct a = 0 c to + 70 c units v cc = + 5.0v v cc = + 5.0v v cc = + 5.0v c l = 50 pf c l = 50 pf c l = 50 pf min typ max min max min max t plh propagation delay 1.0 3.0 5.5 1.0 7.5 1.0 6.5 ns t phl data to output (74f827) 1.5 3.3 5.5 1.5 7.0 1.5 6.0 t plh propagation delay 1.0 3.0 5.0 1.0 5.5 ns t phl data to output (74f828) 1.0 2.0 4.0 1.0 4.0 t pzh output enable time 3.0 5.7 9.0 2.5 10.0 2.5 9.5 ns t pzl oe to o n 3.5 6.8 11.5 3.0 12.5 3.0 12.0 t phz output disable time 1.5 3.3 8.0 1.5 9.0 1.5 8.5 ns t plz oe to o n 1.0 3.5 8.0 1.0 9.0 1.0 8.5
www.fairchildsemi.com 6 74f827 ? 74f828 physical dimensions inches (millimeters) unless otherwise noted 24-lead small outline integrated circuit (soic), jedec ms-013, 0.300 wide package number m24b
7 www.fairchildsemi.com 74f827 ? 74f828 10-bit buffers/line drivers physical dimensions inches (millimeters) unless otherwise noted (continued) 24-lead plastic dual-in-line package (pdip), jedec ms-100, 0.300 wide package number n24c fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchilds products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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